wafer-level

基本解释

One should cover the resistance with metal layer, to avoid the damaged during the wafer level testing.
用金属覆盖电阻,避免wafer级测试时的损伤。
Structure designing and key processing technologies for wafer level package(WLP) were studied.
对圆片级封装(WLP)的结构设计和关键工艺技术进行了研究;
Electrostatic bonding is an important encapsulating means for the materials at the chip or wafer level.
静电键合是片状材料封接的一种重要手段，讨论了玻璃在电场作用下的键合过程。
Research of gold bump for wafer level package
用于圆片级封装的金凸点研制
Ultrathin Wafer Level Chip Size Package Technology
超薄型圆片级芯片尺寸封装技术